sc2210.c 45 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * sc2210 driver
  4. *
  5. * Copyright (C) 2022 Rockchip Electronics Co., Ltd.
  6. *
  7. * V0.0X01.0X01 first version
  8. * 20240810 : 根据SC2210数据手册修改了增益设置函数
  9. */
  10. //#define DEBUG
  11. #include <linux/clk.h>
  12. #include <linux/device.h>
  13. #include <linux/delay.h>
  14. #include <linux/gpio/consumer.h>
  15. #include <linux/i2c.h>
  16. #include <linux/module.h>
  17. #include <linux/pm_runtime.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <linux/sysfs.h>
  20. #include <linux/slab.h>
  21. #include <linux/version.h>
  22. #include <linux/rk-camera-module.h>
  23. #include <linux/rk-preisp.h>
  24. #include <media/media-entity.h>
  25. #include <media/v4l2-async.h>
  26. #include <media/v4l2-ctrls.h>
  27. #include <media/v4l2-subdev.h>
  28. #include <linux/pinctrl/consumer.h>
  29. #include "../platform/rockchip/isp/rkisp_tb_helper.h"
  30. #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01)
  31. #ifndef V4L2_CID_DIGITAL_GAIN
  32. #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
  33. #endif
  34. #define sc2210_LANES (2LL)
  35. #define sc2210_BITS_PER_SAMPLE (10LL)
  36. //#define sc2210_LINK_FREQ_405 432000000LL
  37. //186000000
  38. //202500000LL
  39. //#define sc2210_LINK_FREQ_405 (200000000LL)
  40. // 798M : can not get any video
  41. // 250M :
  42. #define sc2210_LINK_FREQ_405 (200000000LL)
  43. #define PIXEL_RATE_WITH_405M_10BIT (sc2210_LINK_FREQ_405 * 2LL * sc2210_LANES / sc2210_BITS_PER_SAMPLE)
  44. #define CHIP_ID 0x2210
  45. #define sc2210_REG_CHIP_ID 0x3107
  46. #define sc2210_REG_CTRL_MODE 0x0100
  47. #define sc2210_MODE_SW_STANDBY 0x0
  48. #define sc2210_MODE_STREAMING BIT(0)
  49. #define sc2210_REG_EXPOSURE_H 0x3e00
  50. #define sc2210_REG_EXPOSURE_M 0x3e01
  51. #define sc2210_REG_EXPOSURE_L 0x3e02
  52. //1
  53. #define sc2210_EXPOSURE_MIN 1
  54. #define sc2210_EXPOSURE_STEP 1
  55. #define sc2210_VTS_MAX 0x7fff
  56. #define sc2210_REG_DIG_GAIN 0x3e06
  57. #define sc2210_REG_DIG_FINE_GAIN 0x3e07
  58. #define sc2210_REG_ANA_GAIN 0x3e08
  59. #define sc2210_REG_ANA_FINE_GAIN 0x3e09
  60. //agian 0x3F 0x7F 54.07
  61. //dgain 0x0F 0xFC 31.5
  62. #define sc2210_GAIN_MIN (1000) //1x*1000
  63. #define sc2210_GAIN_MAX (1703205) // 54.07*31.5 *1000
  64. #define sc2210_GAIN_STEP 1
  65. #define sc2210_GAIN_DEFAULT (32000) // 32x*1000
  66. //#define sc2210_REG_GROUP_HOLD 0x3812
  67. //#define sc2210_GROUP_HOLD_START 0x00
  68. //#define sc2210_GROUP_HOLD_END 0x30
  69. #define sc2210_REG_TEST_PATTERN 0x4501
  70. #define sc2210_TEST_PATTERN_BIT_MASK BIT(3)
  71. #define sc2210_REG_VTS_H 0x320e
  72. #define sc2210_REG_VTS_L 0x320f
  73. #define sc2210_FLIP_MIRROR_REG 0x3221
  74. #define sc2210_FETCH_EXP_H(VAL) (((VAL) >> 12) & 0xF)
  75. #define sc2210_FETCH_EXP_M(VAL) (((VAL) >> 4) & 0xFF)
  76. #define sc2210_FETCH_EXP_L(VAL) (((VAL) & 0xF) << 4)
  77. #define sc2210_FETCH_AGAIN_H(VAL) (((VAL) >> 8) & 0x03)
  78. #define sc2210_FETCH_AGAIN_L(VAL) ((VAL) & 0xFF)
  79. #define sc2210_FETCH_MIRROR(VAL, ENABLE) (ENABLE ? VAL | 0x06 : VAL & 0xf9)
  80. #define sc2210_FETCH_FLIP(VAL, ENABLE) (ENABLE ? VAL | 0x60 : VAL & 0x9f)
  81. #define REG_DELAY 0xFFFE
  82. #define REG_NULL 0xFFFF
  83. #define sc2210_REG_VALUE_08BIT 1
  84. #define sc2210_REG_VALUE_16BIT 2
  85. #define sc2210_REG_VALUE_24BIT 3
  86. #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
  87. #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
  88. #define sc2210_NAME "sc2210"
  89. static const char * const sc2210_supply_names[] = {
  90. "avdd", /* Analog power */
  91. "dovdd", /* Digital I/O power */
  92. "dvdd", /* Digital core power */
  93. };
  94. #define sc2210_NUM_SUPPLIES ARRAY_SIZE(sc2210_supply_names)
  95. struct regval {
  96. u16 addr;
  97. u8 val;
  98. };
  99. struct sc2210_mode {
  100. u32 bus_fmt;
  101. u32 width;
  102. u32 height;
  103. struct v4l2_fract max_fps;
  104. u32 hts_def;
  105. u32 vts_def;
  106. u32 exp_def;
  107. const struct regval *reg_list;
  108. u32 hdr_mode;
  109. u32 xvclk_freq;
  110. u32 link_freq_idx;
  111. u32 vc[PAD_MAX];
  112. };
  113. struct sc2210 {
  114. struct i2c_client *client;
  115. struct clk *xvclk;
  116. struct gpio_desc *reset_gpio;
  117. struct regulator_bulk_data supplies[sc2210_NUM_SUPPLIES];
  118. struct pinctrl *pinctrl;
  119. struct pinctrl_state *pins_default;
  120. struct pinctrl_state *pins_sleep;
  121. struct v4l2_subdev subdev;
  122. struct media_pad pad;
  123. struct v4l2_ctrl_handler ctrl_handler;
  124. struct v4l2_ctrl *exposure;
  125. struct v4l2_ctrl *anal_gain;
  126. struct v4l2_ctrl *digi_gain;
  127. struct v4l2_ctrl *hblank;
  128. struct v4l2_ctrl *vblank;
  129. struct v4l2_ctrl *pixel_rate;
  130. struct v4l2_ctrl *link_freq;
  131. struct v4l2_ctrl *test_pattern;
  132. struct mutex mutex;
  133. bool streaming;
  134. bool power_on;
  135. const struct sc2210_mode *cur_mode;
  136. u32 module_index;
  137. const char *module_facing;
  138. const char *module_name;
  139. const char *len_name;
  140. u32 cur_vts;
  141. bool has_init_exp;
  142. bool is_thunderboot;
  143. bool is_first_streamoff;
  144. struct preisp_hdrae_exp_s init_hdrae_exp;
  145. };
  146. #define to_sc2210(sd) container_of(sd, struct sc2210, subdev)
  147. /*
  148. * Xclk 24Mhz
  149. */
  150. static const struct regval sc2210_global_regs[] = {
  151. {REG_NULL, 0x00},
  152. };
  153. /*
  154. 1080p_25p
  155. */
  156. static const struct regval sc2210_linear_10_1920x1080_30fps_regs[] = {
  157. {0x0100,0x00},
  158. {0x0100,0x00},
  159. {0x0100,0x00},
  160. {0x0103,0x01}, //reset
  161. {0x0100,0x00},
  162. {0x0100,0x00},
  163. {0x0100,0x00},
  164. {0x0100,0x00},
  165. {0x0100,0x00},
  166. {0x36e9,0x80},
  167. {0x36f9,0x80},
  168. {0x3001,0x07},
  169. {0x3002,0xc0},
  170. {0x300a,0x2c},
  171. {0x300f,0x00},
  172. {0x3018,0x33},
  173. {0x3019,0x0c},
  174. {0x301f,0x47},
  175. {0x3031,0x0a},
  176. {0x3033,0x20},
  177. {0x3038,0x22},
  178. {0x3106,0x81},
  179. {0x3201,0x04},
  180. {0x3203,0x04},
  181. {0x3204,0x07},
  182. {0x3205,0x8b},
  183. {0x3206,0x04},
  184. {0x3207,0x43},
  185. {0x320c,0x04}, //0x44c=1100 应该为 1920/2=960?
  186. {0x320d,0x4c},
  187. {0x320e,0x05},//sc2210_REG_VTS_H
  188. {0x320f,0x46},//25fps sc2210_REG_VTS_L
  189. {0x3211,0x04}, //输出窗口列起始位置
  190. {0x3213,0x04}, //输出窗口行起始位置
  191. {0x3231,0x02},
  192. {0x3253,0x04},
  193. {0x3301,0x0a},
  194. {0x3302,0x10},
  195. {0x3304,0x48},
  196. {0x3305,0x00},
  197. {0x3306,0x68},
  198. {0x3308,0x20},
  199. {0x3309,0x98},
  200. {0x330a,0x00},
  201. {0x330b,0xe8},
  202. {0x330e,0x68},
  203. {0x3314,0x92},
  204. {0x3000,0xc0},
  205. {0x331e,0x41},
  206. {0x331f,0x91},
  207. {0x334c,0x10},
  208. {0x335d,0x60},
  209. {0x335e,0x02},
  210. {0x335f,0x06},
  211. {0x3364,0x16},
  212. {0x3366,0x92},
  213. {0x3367,0x10},
  214. {0x3368,0x04},
  215. {0x3369,0x00},
  216. {0x336a,0x00},
  217. {0x336b,0x00},
  218. {0x336d,0x03},
  219. {0x337c,0x08},
  220. {0x337d,0x0e},
  221. {0x337f,0x33},
  222. {0x3390,0x10},
  223. {0x3391,0x30},
  224. {0x3392,0x40},
  225. {0x3393,0x0a},
  226. {0x3394,0x0a},
  227. {0x3395,0x0a},
  228. {0x3396,0x08},
  229. {0x3397,0x30},
  230. {0x3398,0x3f},
  231. {0x3399,0x50},
  232. {0x339a,0x50},
  233. {0x339b,0x50},
  234. {0x339c,0x50},
  235. {0x33a2,0x0a},
  236. {0x33b9,0x0e},
  237. {0x33e1,0x08},
  238. {0x33e2,0x18},
  239. {0x33e3,0x18},
  240. {0x33e4,0x18},
  241. {0x33e5,0x10},
  242. {0x33e6,0x06},
  243. {0x33e7,0x02},
  244. {0x33e8,0x18},
  245. {0x33e9,0x10},
  246. {0x33ea,0x0c},
  247. {0x33eb,0x10},
  248. {0x33ec,0x04},
  249. {0x33ed,0x02},
  250. {0x33ee,0xa0},
  251. {0x33ef,0x08},
  252. {0x33f4,0x18},
  253. {0x33f5,0x10},
  254. {0x33f6,0x0c},
  255. {0x33f7,0x10},
  256. {0x33f8,0x06},
  257. {0x33f9,0x02},
  258. {0x33fa,0x18},
  259. {0x33fb,0x10},
  260. {0x33fc,0x0c},
  261. {0x33fd,0x10},
  262. {0x33fe,0x04},
  263. {0x33ff,0x02},
  264. {0x360f,0x01},
  265. {0x3622,0xf7},
  266. {0x3625,0x0a},
  267. {0x3627,0x02},
  268. {0x3630,0xa2},
  269. {0x3631,0x00},
  270. {0x3632,0xd8},
  271. {0x3633,0x33},
  272. {0x3635,0x20},
  273. {0x3638,0x24},
  274. {0x363a,0x80},
  275. {0x363b,0x02},
  276. {0x363e,0x22},
  277. {0x3670,0x40},
  278. {0x3671,0xf7},
  279. {0x3672,0xf7},
  280. {0x3673,0x07},
  281. {0x367a,0x40},
  282. {0x367b,0x7f},
  283. {0x36b5,0x40},
  284. {0x36b6,0x7f},
  285. {0x36c0,0x80},
  286. {0x36c1,0x9f},
  287. {0x36c2,0x9f},
  288. {0x36cc,0x22},
  289. {0x36cd,0x23},
  290. {0x36ce,0x30},
  291. {0x36d0,0x20},
  292. {0x36d1,0x40},
  293. {0x36d2,0x7f},
  294. {0x36ea,0x75},
  295. {0x36eb,0x0d},
  296. {0x36ec,0x13},
  297. {0x36ed,0x24},
  298. {0x36fa,0x5f},
  299. {0x36fb,0x1b},
  300. {0x36fc,0x10},
  301. {0x36fd,0x07},
  302. {0x3905,0xd8},
  303. {0x3907,0x01},
  304. {0x3908,0x11},
  305. {0x391b,0x83},
  306. {0x391d,0x2c},
  307. {0x391f,0x00},
  308. {0x3933,0x28},
  309. {0x3934,0xa6},
  310. {0x3940,0x70},
  311. {0x3942,0x08},
  312. {0x3943,0xbc},
  313. {0x3958,0x02},
  314. {0x3959,0x04},
  315. {0x3980,0x61},
  316. {0x3987,0x0b},
  317. {0x3990,0x00},
  318. {0x3991,0x00},
  319. {0x3992,0x00},
  320. {0x3993,0x00},
  321. {0x3994,0x00},
  322. {0x3995,0x00},
  323. {0x3996,0x00},
  324. {0x3997,0x00},
  325. {0x3998,0x00},
  326. {0x3999,0x00},
  327. {0x399a,0x00},
  328. {0x399b,0x00},
  329. {0x399c,0x00},
  330. {0x399d,0x00},
  331. {0x399e,0x00},
  332. {0x399f,0x00},
  333. {0x39a0,0x00},
  334. {0x39a1,0x00},
  335. {0x39a2,0x03},
  336. {0x39a3,0x30},
  337. {0x39a4,0x03},
  338. {0x39a5,0x60},
  339. {0x39a6,0x03},
  340. {0x39a7,0xa0},
  341. {0x39a8,0x03},
  342. {0x39a9,0xb0},
  343. {0x39aa,0x00},
  344. {0x39ab,0x00},
  345. {0x39ac,0x00},
  346. {0x39ad,0x20},
  347. {0x39ae,0x00},
  348. {0x39af,0x40},
  349. {0x39b0,0x00},
  350. {0x39b1,0x60},
  351. {0x39b2,0x00},
  352. {0x39b3,0x00},
  353. {0x39b4,0x08},
  354. {0x39b5,0x14},
  355. {0x39b6,0x20},
  356. {0x39b7,0x38},
  357. {0x39b8,0x38},
  358. {0x39b9,0x20},
  359. {0x39ba,0x14},
  360. {0x39bb,0x08},
  361. {0x39bc,0x08},
  362. {0x39bd,0x10},
  363. {0x39be,0x20},
  364. {0x39bf,0x30},
  365. {0x39c0,0x30},
  366. {0x39c1,0x20},
  367. {0x39c2,0x10},
  368. {0x39c3,0x08},
  369. {0x39c4,0x00},
  370. {0x39c5,0x80},
  371. {0x39c6,0x00},
  372. {0x39c7,0x80},
  373. {0x39c8,0x00},
  374. {0x39c9,0x00},
  375. {0x39ca,0x80},
  376. {0x39cb,0x00},
  377. {0x39cc,0x00},
  378. {0x39cd,0x00},
  379. {0x39ce,0x00},
  380. {0x39cf,0x00},
  381. {0x39d0,0x00},
  382. {0x39d1,0x00},
  383. {0x39e2,0x05},
  384. {0x39e3,0xeb},
  385. {0x39e4,0x07},
  386. {0x39e5,0xb6},
  387. {0x39e6,0x00},
  388. {0x39e7,0x3a},
  389. {0x39e8,0x3f},
  390. {0x39e9,0xb7},
  391. {0x39ea,0x02},
  392. {0x39eb,0x4f},
  393. {0x39ec,0x08},
  394. {0x39ed,0x00},
  395. {0x3e01,0x05},
  396. {0x3e02,0x43},
  397. {0x3e09,0x40},
  398. {0x3e14,0x31},
  399. {0x3e1b,0x3a},
  400. {0x3e26,0x40},
  401. {0x4401,0x1a},
  402. {0x4407,0xc0},
  403. {0x4418,0x34},
  404. {0x4500,0x18},
  405. {0x4501,0xb4}, //test patten 0xb4
  406. {0x4509,0x20},
  407. {0x4603,0x00},
  408. {0x4800,0x24},
  409. {0x4837,0x2b},
  410. {0x5000,0x0e},
  411. {0x550f,0x20},
  412. {0x36e9,0x51},
  413. {0x36f9,0x53},
  414. //{0x0100,0x01},
  415. {REG_NULL, 0x00},
  416. };
  417. static const struct sc2210_mode supported_modes[] = {
  418. {
  419. .width = 1920,
  420. .height = 1080,
  421. .max_fps = {
  422. .numerator = 1,
  423. .denominator = 25,
  424. },
  425. .exp_def = 0x80, //0x080
  426. .hts_def = (1100),
  427. .vts_def = (0x546), //0x546
  428. .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10, //MEDIA_BUS_FMT_SBGGR10_1X10
  429. // .bus_fmt = MEDIA_BUS_FMT_Y10_1X10,
  430. .reg_list = sc2210_linear_10_1920x1080_30fps_regs,
  431. .hdr_mode = NO_HDR,
  432. .xvclk_freq = 27000000,
  433. .link_freq_idx = 0,
  434. .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
  435. },
  436. };
  437. static const s64 link_freq_menu_items[] = {
  438. sc2210_LINK_FREQ_405,
  439. };
  440. static const char * const sc2210_test_pattern_menu[] = {
  441. "Disabled",
  442. "Vertical Color Bar Type 2",
  443. "Vertical Color Bar Type 3",
  444. "Vertical Color Bar Type 4",
  445. };
  446. /* Write registers up to 4 at a time */
  447. static int sc2210_write_reg(struct i2c_client *client, u16 reg,
  448. u32 len, u32 val)
  449. {
  450. u32 buf_i, val_i;
  451. u8 buf[6];
  452. u8 *val_p;
  453. __be32 val_be;
  454. if (len > 4)
  455. return -EINVAL;
  456. udelay(10*1000); //debug add
  457. buf[0] = reg >> 8;
  458. buf[1] = reg & 0xff;
  459. val_be = cpu_to_be32(val);
  460. val_p = (u8 *)&val_be;
  461. buf_i = 2;
  462. val_i = 4 - len;
  463. while (val_i < 4)
  464. buf[buf_i++] = val_p[val_i++];
  465. if (i2c_master_send(client, buf, len + 2) != len + 2)
  466. {
  467. printk("isc2210_write_reg i2c_master_send error addr=0x%X val=0x%X len=%d \n",reg,val,len);
  468. return -EIO;
  469. }
  470. printk("sc2210_write_reg! addr=0x%X val=0x%X len=%d \n",reg,val,len);
  471. return 0;
  472. }
  473. static int isc2210_write_reg(struct i2c_client *client, u16 reg,
  474. u32 len, u32 val)
  475. {
  476. u32 buf_i, val_i;
  477. u8 buf[6];
  478. u8 *val_p;
  479. __be32 val_be;
  480. if (len > 4)
  481. return -EINVAL;
  482. udelay(10*1000); //debug add
  483. buf[0] = reg >> 8;
  484. buf[1] = reg & 0xff;
  485. val_be = cpu_to_be32(val);
  486. val_p = (u8 *)&val_be;
  487. buf_i = 2;
  488. val_i = 4 - len;
  489. while (val_i < 4)
  490. buf[buf_i++] = val_p[val_i++];
  491. if (i2c_master_send(client, buf, len + 2) != len + 2)
  492. {
  493. printk("isc2210_write_reg i2c_master_send error addr=0x%X val=0x%X len=%d \n",reg,val,len);
  494. return -EIO;
  495. }
  496. // printk("sc2210_write_reg! addr=0x%X val=0x%X len=%d \n",reg,val,len);
  497. return 0;
  498. }
  499. static int sc2210_write_array(struct i2c_client *client,
  500. const struct regval *regs)
  501. {
  502. u32 i,j;
  503. int ret = 0;
  504. for(j=0;j<10;j++)
  505. {
  506. for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
  507. ret = isc2210_write_reg(client, regs[i].addr,
  508. sc2210_REG_VALUE_08BIT, regs[i].val);
  509. printk("sc2210_write_array! i=%d \n",i);
  510. if(i==257)
  511. break;
  512. }
  513. return ret;
  514. }
  515. /* Read registers up to 4 at a time */
  516. static int sc2210_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
  517. u32 *val)
  518. {
  519. struct i2c_msg msgs[2];
  520. u8 *data_be_p;
  521. __be32 data_be = 0;
  522. __be16 reg_addr_be = cpu_to_be16(reg);
  523. int ret;
  524. if (len > 4 || !len)
  525. return -EINVAL;
  526. data_be_p = (u8 *)&data_be;
  527. /* Write register address */
  528. msgs[0].addr = client->addr;
  529. msgs[0].flags = 0;
  530. msgs[0].len = 2;
  531. msgs[0].buf = (u8 *)&reg_addr_be;
  532. /* Read data from register */
  533. msgs[1].addr = client->addr;
  534. msgs[1].flags = I2C_M_RD;
  535. msgs[1].len = len;
  536. msgs[1].buf = &data_be_p[4 - len];
  537. ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
  538. if (ret != ARRAY_SIZE(msgs))
  539. return -EIO;
  540. *val = be32_to_cpu(data_be);
  541. return 0;
  542. }
  543. #if 1
  544. //static int sc4238_get_gain_reg(struct sc4238 *sc4238, u32 total_gain,
  545. // u32 *again_coarse_reg, u32 *again_fine_reg,
  546. // u32 *dgain_coarse_reg, u32 *dgain_fine_reg)
  547. static int sc2210_set_gain_reg(struct sc2210 *sc2210, u32 gain)
  548. {
  549. u32 again_coarse_reg, u32 again_fine_reg;
  550. u32 dgain_coarse_reg, u32 dgain_fine_reg;
  551. float fgain,again, dgain;
  552. //agian 0x3F 0x7F 54.07
  553. //dgain 0x0F 0xFC 31.5
  554. // if (total_gain > 32004) {
  555. // dev_err(&sc4238->client->dev,
  556. // "total_gain max is 15.875*31.5*64, current total_gain is %d\n",
  557. // total_gain);
  558. // return -EINVAL;
  559. // }
  560. fgain = (float)gain/1000.0;
  561. if (fgain > 54.07) {
  562. again = 54.07;
  563. dgain = fgain /54.07;
  564. } else {
  565. again = fgain;
  566. dgain = 1.0;
  567. }
  568. //数值比数据手册大一点0.0001,为了解决浮点数不能相等的问题
  569. if (again < 1.9841) {
  570. again_fine_reg = 0x40 + (u32)((again-1.0)*(1/64.0));
  571. again_coarse_reg = 0x03;
  572. } else if (again < 3.3751) {
  573. again_fine_reg = 0x40 + (u32)((again-2.0)*(1/32.0));
  574. again_coarse_reg = 0x07;
  575. } else if (again < 6.7591) {
  576. again_fine_reg = 0x40 + (u32)((again-3.406)*(0.053));
  577. again_coarse_reg = 0x23;
  578. } else if (again < 13.5181) {
  579. again_fine_reg = 0x40 + (u32)((again-6.812)*(0.106));
  580. again_coarse_reg = 0x27;
  581. } else if (again < 27.0351) {
  582. again_fine_reg = 0x40 + (u32)((again-13.624)*(0.213));
  583. again_coarse_reg = 0x2F;
  584. } else if (again < (54.0701)) {
  585. again_fine_reg = 0x40 + (u32)((again-27.248)*(0.426));
  586. again_coarse_reg = 0x3F;
  587. }
  588. if (dgain < 1.9691) {
  589. dgain_fine_reg = 0x80 + (u32)((dgain-1.0)*(0.125/4/4));
  590. dgain_coarse_reg = 0x00;
  591. } else if (dgain < 3.9381) {
  592. dgain_fine_reg = 0x80 + (u32)((dgain-2.0)*(0.125/2/4));
  593. dgain_coarse_reg = 0x01;
  594. } else if (dgain < 7.8751) {
  595. dgain_fine_reg = 0x80 + (u32)((dgain-4.0)*(0.125/4));
  596. dgain_coarse_reg = 0x03;
  597. } else if (dgain < 15.7501) {
  598. dgain_fine_reg = 0x80 + (u32)((dgain-8.0)*(0.25/4));
  599. dgain_coarse_reg = 0x07;
  600. } else if (dgain < 31.5001) {
  601. dgain_fine_reg = 0x80 + (u32)((dgain-16.0)*(0.5/4));
  602. dgain_coarse_reg = 0x0F;
  603. }
  604. dev_dbg(&sc2210->client->dev,
  605. "total_gain 0x%x again_coarse 0x%x, again_fine 0x%x, dgain_coarse 0x%x, dgain_fine 0x%x\n",
  606. gain, again_coarse_reg, again_fine_reg, dgain_coarse_reg, dgain_fine_reg);
  607. printk("sc2210_set_gain_reg total_gain 0x%x again_coarse 0x%x, again_fine 0x%x, dgain_coarse 0x%x, dgain_fine 0x%x\n",
  608. gain, again_coarse_reg, again_fine_reg, dgain_coarse_reg, dgain_fine_reg);
  609. ret = sc2210_write_reg(sc2210->client,
  610. sc2210_REG_DIG_GAIN,
  611. sc2210_REG_VALUE_08BIT,
  612. dgain_coarse_reg);
  613. ret |= sc2210_write_reg(sc2210->client,
  614. sc2210_REG_DIG_FINE_GAIN,
  615. sc2210_REG_VALUE_08BIT,
  616. dgain_fine_reg);
  617. ret |= sc2210_write_reg(sc2210->client,
  618. sc2210_REG_ANA_GAIN,
  619. sc2210_REG_VALUE_08BIT,
  620. again_coarse_reg);
  621. ret |= sc2210_write_reg(sc2210->client,
  622. sc2210_REG_ANA_FINE_GAIN,
  623. sc2210_REG_VALUE_08BIT,
  624. again_fine_reg);
  625. return ret;
  626. }
  627. #else
  628. static int sc2210_set_gain_reg(struct sc2210 *sc2210, u32 gain)
  629. {
  630. u32 coarse_again = 0, coarse_dgain = 0, fine_dgain = 0;
  631. u32 gain_factor;
  632. int ret = 0;
  633. // return ret; //debug ws
  634. gain_factor = gain * 1000 / 32;
  635. if (gain_factor < 1000) {
  636. coarse_again = 0x00;
  637. coarse_dgain = 0x00;
  638. fine_dgain = 0x80;
  639. } else if (gain_factor < 1000 * 2) { /*1x ~ 2x gain*/
  640. coarse_again = 0x00;
  641. coarse_dgain = 0x00;
  642. fine_dgain = gain_factor * 128 / 1000;
  643. } else if (gain_factor < 1000 * 4) { /*2x ~ 4x gain*/
  644. coarse_again = 0x01;
  645. coarse_dgain = 0x00;
  646. fine_dgain = gain_factor * 128 / 1000 / 2;
  647. } else if (gain_factor < 1000 * 8) { /*4x ~ 8x gain*/
  648. coarse_again = 0x03;
  649. coarse_dgain = 0x00;
  650. fine_dgain = gain_factor * 128 / 1000 / 4;
  651. } else if (gain_factor < 1000 * 16) { /*8x ~ 16x gain*/
  652. coarse_again = 0x07;
  653. coarse_dgain = 0x00;
  654. fine_dgain = gain_factor * 128 / 1000 / 8;
  655. } else if (gain_factor < 1000 * 32) { /*16x ~ 32x gain*/
  656. coarse_again = 0x0f;
  657. coarse_dgain = 0x00;
  658. fine_dgain = gain_factor * 128 / 1000 / 16;
  659. //open dgain begin max digital gain 4X
  660. } else if (gain_factor < 1000 * 64) { /*32x ~ 64x gain*/
  661. coarse_again = 0x1f;
  662. coarse_dgain = 0x00;
  663. fine_dgain = gain_factor * 128 / 1000 / 32;
  664. } else if (gain_factor < 1000 * 128) { /*64x ~ 128x gain*/
  665. coarse_again = 0x1f;
  666. coarse_dgain = 0x01;
  667. fine_dgain = gain_factor * 128 / 1000 / 64;
  668. } else { /*max 128x gain*/
  669. coarse_again = 0x1f;
  670. coarse_dgain = 0x03;
  671. fine_dgain = 0x80;
  672. }
  673. dev_dbg(&sc2210->client->dev,
  674. "total_gain: 0x%x, d_gain: 0x%x, d_fine_gain: 0x%x, c_gain: 0x%x\n",
  675. gain, coarse_dgain, fine_dgain, coarse_again);
  676. printk("sc2210_set_gain_reg total_gain: 0x%x, d_gain: 0x%x, d_fine_gain: 0x%x, c_gain: 0x%x\n",
  677. gain, coarse_dgain, fine_dgain, coarse_again);
  678. ret = sc2210_write_reg(sc2210->client,
  679. sc2210_REG_DIG_GAIN,
  680. sc2210_REG_VALUE_08BIT,
  681. coarse_dgain);
  682. ret |= sc2210_write_reg(sc2210->client,
  683. sc2210_REG_DIG_FINE_GAIN,
  684. sc2210_REG_VALUE_08BIT,
  685. fine_dgain);
  686. ret |= sc2210_write_reg(sc2210->client,
  687. sc2210_REG_ANA_GAIN,
  688. sc2210_REG_VALUE_08BIT,
  689. coarse_again);
  690. return ret;
  691. }
  692. #endif
  693. static int sc2210_get_reso_dist(const struct sc2210_mode *mode,
  694. struct v4l2_mbus_framefmt *framefmt)
  695. {
  696. return abs(mode->width - framefmt->width) +
  697. abs(mode->height - framefmt->height);
  698. }
  699. static const struct sc2210_mode *
  700. sc2210_find_best_fit(struct v4l2_subdev_format *fmt)
  701. {
  702. struct v4l2_mbus_framefmt *framefmt = &fmt->format;
  703. int dist;
  704. int cur_best_fit = 0;
  705. int cur_best_fit_dist = -1;
  706. unsigned int i;
  707. for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
  708. dist = sc2210_get_reso_dist(&supported_modes[i], framefmt);
  709. if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
  710. cur_best_fit_dist = dist;
  711. cur_best_fit = i;
  712. }
  713. }
  714. return &supported_modes[cur_best_fit];
  715. }
  716. static int sc2210_set_fmt(struct v4l2_subdev *sd,
  717. struct v4l2_subdev_pad_config *cfg,
  718. struct v4l2_subdev_format *fmt)
  719. {
  720. struct sc2210 *sc2210 = to_sc2210(sd);
  721. const struct sc2210_mode *mode;
  722. struct device *dev = &sc2210->client->dev;
  723. s64 h_blank, vblank_def;
  724. u64 dst_link_freq = 0;
  725. u64 dst_pixel_rate = 0;
  726. dev_info(dev,"enter sc2210_set_fmt\n");
  727. mutex_lock(&sc2210->mutex);
  728. mode = sc2210_find_best_fit(fmt);
  729. fmt->format.code = mode->bus_fmt;
  730. fmt->format.width = mode->width;
  731. fmt->format.height = mode->height;
  732. fmt->format.field = V4L2_FIELD_NONE;
  733. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  734. dev_info(dev,"enter v4l2_subdev_get_try_format\n");
  735. #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
  736. *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
  737. #else
  738. mutex_unlock(&sc2210->mutex);
  739. return -ENOTTY;
  740. #endif
  741. } else {
  742. sc2210->cur_mode = mode;
  743. h_blank = mode->hts_def - mode->width;
  744. __v4l2_ctrl_modify_range(sc2210->hblank, h_blank,
  745. h_blank, 1, h_blank);
  746. vblank_def = mode->vts_def - mode->height;
  747. __v4l2_ctrl_modify_range(sc2210->vblank, vblank_def,
  748. sc2210_VTS_MAX - mode->height,
  749. 1, vblank_def);
  750. dst_link_freq = mode->link_freq_idx;
  751. dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
  752. sc2210_BITS_PER_SAMPLE * 2 * sc2210_LANES;
  753. __v4l2_ctrl_s_ctrl_int64(sc2210->pixel_rate,
  754. dst_pixel_rate);
  755. __v4l2_ctrl_s_ctrl(sc2210->link_freq,
  756. dst_link_freq);
  757. dev_info(dev,"h_blank=%lld vblank_def=%lld dst_link_freq=%lld dst_pixel_rate=%lld\n",h_blank,vblank_def,dst_link_freq,dst_pixel_rate);
  758. }
  759. mutex_unlock(&sc2210->mutex);
  760. return 0;
  761. }
  762. static int sc2210_get_fmt(struct v4l2_subdev *sd,
  763. struct v4l2_subdev_pad_config *cfg,
  764. struct v4l2_subdev_format *fmt)
  765. {
  766. struct sc2210 *sc2210 = to_sc2210(sd);
  767. const struct sc2210_mode *mode = sc2210->cur_mode;
  768. mutex_lock(&sc2210->mutex);
  769. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  770. #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
  771. fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  772. #else
  773. mutex_unlock(&sc2210->mutex);
  774. return -ENOTTY;
  775. #endif
  776. } else {
  777. fmt->format.width = mode->width;
  778. fmt->format.height = mode->height;
  779. fmt->format.code = mode->bus_fmt;
  780. fmt->format.field = V4L2_FIELD_NONE;
  781. /* format info: width/height/data type/virctual channel */
  782. if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
  783. fmt->reserved[0] = mode->vc[fmt->pad];
  784. else
  785. fmt->reserved[0] = mode->vc[PAD0];
  786. }
  787. mutex_unlock(&sc2210->mutex);
  788. return 0;
  789. }
  790. static int sc2210_enum_mbus_code(struct v4l2_subdev *sd,
  791. struct v4l2_subdev_pad_config *cfg,
  792. struct v4l2_subdev_mbus_code_enum *code)
  793. {
  794. struct sc2210 *sc2210 = to_sc2210(sd);
  795. if (code->index != 0)
  796. return -EINVAL;
  797. code->code = sc2210->cur_mode->bus_fmt;
  798. return 0;
  799. }
  800. static int sc2210_enum_frame_sizes(struct v4l2_subdev *sd,
  801. struct v4l2_subdev_pad_config *cfg,
  802. struct v4l2_subdev_frame_size_enum *fse)
  803. {
  804. if (fse->index >= ARRAY_SIZE(supported_modes))
  805. return -EINVAL;
  806. if (fse->code != supported_modes[0].bus_fmt)
  807. return -EINVAL;
  808. fse->min_width = supported_modes[fse->index].width;
  809. fse->max_width = supported_modes[fse->index].width;
  810. fse->max_height = supported_modes[fse->index].height;
  811. fse->min_height = supported_modes[fse->index].height;
  812. return 0;
  813. }
  814. static int sc2210_enable_test_pattern(struct sc2210 *sc2210, u32 pattern)
  815. {
  816. u32 val = 0;
  817. int ret = 0;
  818. ret = sc2210_read_reg(sc2210->client, sc2210_REG_TEST_PATTERN,
  819. sc2210_REG_VALUE_08BIT, &val);
  820. if (pattern)
  821. val |= sc2210_TEST_PATTERN_BIT_MASK;
  822. else
  823. val &= ~sc2210_TEST_PATTERN_BIT_MASK;
  824. ret |= sc2210_write_reg(sc2210->client, sc2210_REG_TEST_PATTERN,
  825. sc2210_REG_VALUE_08BIT, val);
  826. return ret;
  827. }
  828. static int sc2210_g_frame_interval(struct v4l2_subdev *sd,
  829. struct v4l2_subdev_frame_interval *fi)
  830. {
  831. struct sc2210 *sc2210 = to_sc2210(sd);
  832. const struct sc2210_mode *mode = sc2210->cur_mode;
  833. fi->interval = mode->max_fps;
  834. return 0;
  835. }
  836. static int sc2210_g_mbus_config(struct v4l2_subdev *sd,
  837. unsigned int pad_id,
  838. struct v4l2_mbus_config *config)
  839. {
  840. struct sc2210 *sc2210 = to_sc2210(sd);
  841. const struct sc2210_mode *mode = sc2210->cur_mode;
  842. u32 val = (1 << (sc2210_LANES - 1)) |
  843. V4L2_MBUS_CSI2_CHANNEL_0 |
  844. V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK; // V4L2_MBUS_CSI2_CONTINUOUS_CLOCK
  845. // if (mode->hdr_mode != NO_HDR)
  846. // val |= V4L2_MBUS_CSI2_CHANNEL_1;
  847. // if (mode->hdr_mode == HDR_X3)
  848. // val |= V4L2_MBUS_CSI2_CHANNEL_2;
  849. config->type = V4L2_MBUS_CSI2_DPHY;
  850. config->flags = val;
  851. printk("sc2210_g_mbus_config val=0x%X hdr_mode=%d\n",val,mode->hdr_mode );
  852. return 0;
  853. }
  854. static void sc2210_get_module_inf(struct sc2210 *sc2210,
  855. struct rkmodule_inf *inf)
  856. {
  857. memset(inf, 0, sizeof(*inf));
  858. strscpy(inf->base.sensor, sc2210_NAME, sizeof(inf->base.sensor));
  859. strscpy(inf->base.module, sc2210->module_name,
  860. sizeof(inf->base.module));
  861. strscpy(inf->base.lens, sc2210->len_name, sizeof(inf->base.lens));
  862. }
  863. static long sc2210_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  864. {
  865. struct sc2210 *sc2210 = to_sc2210(sd);
  866. struct rkmodule_hdr_cfg *hdr;
  867. u32 i, h, w;
  868. long ret = 0;
  869. u32 stream = 0;
  870. switch (cmd) {
  871. case RKMODULE_GET_MODULE_INFO:
  872. sc2210_get_module_inf(sc2210, (struct rkmodule_inf *)arg);
  873. break;
  874. case RKMODULE_GET_HDR_CFG:
  875. hdr = (struct rkmodule_hdr_cfg *)arg;
  876. hdr->esp.mode = HDR_NORMAL_VC;
  877. hdr->hdr_mode = sc2210->cur_mode->hdr_mode;
  878. break;
  879. case RKMODULE_SET_HDR_CFG:
  880. hdr = (struct rkmodule_hdr_cfg *)arg;
  881. w = sc2210->cur_mode->width;
  882. h = sc2210->cur_mode->height;
  883. for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
  884. if (w == supported_modes[i].width &&
  885. h == supported_modes[i].height &&
  886. supported_modes[i].hdr_mode == hdr->hdr_mode) {
  887. sc2210->cur_mode = &supported_modes[i];
  888. break;
  889. }
  890. }
  891. if (i == ARRAY_SIZE(supported_modes)) {
  892. dev_err(&sc2210->client->dev,
  893. "not find hdr mode:%d %dx%d config\n",
  894. hdr->hdr_mode, w, h);
  895. ret = -EINVAL;
  896. } else {
  897. w = sc2210->cur_mode->hts_def - sc2210->cur_mode->width;
  898. h = sc2210->cur_mode->vts_def - sc2210->cur_mode->height;
  899. __v4l2_ctrl_modify_range(sc2210->hblank, w, w, 1, w);
  900. __v4l2_ctrl_modify_range(sc2210->vblank, h,
  901. sc2210_VTS_MAX - sc2210->cur_mode->height, 1, h);
  902. }
  903. break;
  904. case PREISP_CMD_SET_HDRAE_EXP:
  905. break;
  906. case RKMODULE_SET_QUICK_STREAM:
  907. stream = *((u32 *)arg);
  908. if (stream)
  909. ret = sc2210_write_reg(sc2210->client, sc2210_REG_CTRL_MODE,
  910. sc2210_REG_VALUE_08BIT, sc2210_MODE_STREAMING);
  911. else
  912. ret = sc2210_write_reg(sc2210->client, sc2210_REG_CTRL_MODE,
  913. sc2210_REG_VALUE_08BIT, sc2210_MODE_SW_STANDBY);
  914. break;
  915. default:
  916. ret = -ENOIOCTLCMD;
  917. break;
  918. }
  919. return ret;
  920. }
  921. #ifdef CONFIG_COMPAT
  922. static long sc2210_compat_ioctl32(struct v4l2_subdev *sd,
  923. unsigned int cmd, unsigned long arg)
  924. {
  925. void __user *up = compat_ptr(arg);
  926. struct rkmodule_inf *inf;
  927. struct rkmodule_hdr_cfg *hdr;
  928. struct preisp_hdrae_exp_s *hdrae;
  929. long ret;
  930. u32 stream = 0;
  931. switch (cmd) {
  932. case RKMODULE_GET_MODULE_INFO:
  933. inf = kzalloc(sizeof(*inf), GFP_KERNEL);
  934. if (!inf) {
  935. ret = -ENOMEM;
  936. return ret;
  937. }
  938. ret = sc2210_ioctl(sd, cmd, inf);
  939. if (!ret) {
  940. if (copy_to_user(up, inf, sizeof(*inf)))
  941. ret = -EFAULT;
  942. }
  943. kfree(inf);
  944. break;
  945. case RKMODULE_GET_HDR_CFG:
  946. hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
  947. if (!hdr) {
  948. ret = -ENOMEM;
  949. return ret;
  950. }
  951. ret = sc2210_ioctl(sd, cmd, hdr);
  952. if (!ret) {
  953. if (copy_to_user(up, hdr, sizeof(*hdr)))
  954. ret = -EFAULT;
  955. }
  956. kfree(hdr);
  957. break;
  958. case RKMODULE_SET_HDR_CFG:
  959. hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
  960. if (!hdr) {
  961. ret = -ENOMEM;
  962. return ret;
  963. }
  964. ret = copy_from_user(hdr, up, sizeof(*hdr));
  965. if (!ret)
  966. ret = sc2210_ioctl(sd, cmd, hdr);
  967. else
  968. ret = -EFAULT;
  969. kfree(hdr);
  970. break;
  971. case PREISP_CMD_SET_HDRAE_EXP:
  972. hdrae = kzalloc(sizeof(*hdrae), GFP_KERNEL);
  973. if (!hdrae) {
  974. ret = -ENOMEM;
  975. return ret;
  976. }
  977. ret = copy_from_user(hdrae, up, sizeof(*hdrae));
  978. if (!ret)
  979. ret = sc2210_ioctl(sd, cmd, hdrae);
  980. else
  981. ret = -EFAULT;
  982. kfree(hdrae);
  983. break;
  984. case RKMODULE_SET_QUICK_STREAM:
  985. ret = copy_from_user(&stream, up, sizeof(u32));
  986. if (!ret)
  987. ret = sc2210_ioctl(sd, cmd, &stream);
  988. else
  989. ret = -EFAULT;
  990. break;
  991. default:
  992. ret = -ENOIOCTLCMD;
  993. break;
  994. }
  995. return ret;
  996. }
  997. #endif
  998. static int __sc2210_start_stream(struct sc2210 *sc2210)
  999. {
  1000. int ret;
  1001. if (!sc2210->is_thunderboot) {
  1002. ret = sc2210_write_array(sc2210->client, sc2210->cur_mode->reg_list);
  1003. if (ret)
  1004. return ret;
  1005. /* In case these controls are set before streaming */
  1006. ret = __v4l2_ctrl_handler_setup(&sc2210->ctrl_handler);
  1007. if (ret)
  1008. return ret;
  1009. if (sc2210->has_init_exp && sc2210->cur_mode->hdr_mode != NO_HDR) {
  1010. ret = sc2210_ioctl(&sc2210->subdev, PREISP_CMD_SET_HDRAE_EXP,
  1011. &sc2210->init_hdrae_exp);
  1012. if (ret) {
  1013. dev_err(&sc2210->client->dev,
  1014. "init exp fail in hdr mode\n");
  1015. return ret;
  1016. }
  1017. }
  1018. }
  1019. ret = sc2210_write_reg(sc2210->client, sc2210_REG_CTRL_MODE,
  1020. sc2210_REG_VALUE_08BIT, sc2210_MODE_STREAMING);
  1021. return ret;
  1022. }
  1023. static int __sc2210_stop_stream(struct sc2210 *sc2210)
  1024. {
  1025. sc2210->has_init_exp = false;
  1026. if (sc2210->is_thunderboot) {
  1027. sc2210->is_first_streamoff = true;
  1028. pm_runtime_put(&sc2210->client->dev);
  1029. }
  1030. return sc2210_write_reg(sc2210->client, sc2210_REG_CTRL_MODE,
  1031. sc2210_REG_VALUE_08BIT, sc2210_MODE_SW_STANDBY);
  1032. }
  1033. static int __sc2210_power_on(struct sc2210 *sc2210);
  1034. static int sc2210_s_stream(struct v4l2_subdev *sd, int on)
  1035. {
  1036. struct sc2210 *sc2210 = to_sc2210(sd);
  1037. struct i2c_client *client = sc2210->client;
  1038. int ret = 0;
  1039. mutex_lock(&sc2210->mutex);
  1040. on = !!on;
  1041. if (on == sc2210->streaming)
  1042. goto unlock_and_return;
  1043. if (on) {
  1044. if (sc2210->is_thunderboot && rkisp_tb_get_state() == RKISP_TB_NG) {
  1045. sc2210->is_thunderboot = false;
  1046. __sc2210_power_on(sc2210);
  1047. }
  1048. ret = pm_runtime_get_sync(&client->dev);
  1049. if (ret < 0) {
  1050. pm_runtime_put_noidle(&client->dev);
  1051. goto unlock_and_return;
  1052. }
  1053. ret = __sc2210_start_stream(sc2210);
  1054. if (ret) {
  1055. v4l2_err(sd, "start stream failed while write regs\n");
  1056. pm_runtime_put(&client->dev);
  1057. goto unlock_and_return;
  1058. }
  1059. } else {
  1060. __sc2210_stop_stream(sc2210);
  1061. pm_runtime_put(&client->dev);
  1062. }
  1063. sc2210->streaming = on;
  1064. unlock_and_return:
  1065. mutex_unlock(&sc2210->mutex);
  1066. return ret;
  1067. }
  1068. static int sc2210_s_power(struct v4l2_subdev *sd, int on)
  1069. {
  1070. struct sc2210 *sc2210 = to_sc2210(sd);
  1071. struct i2c_client *client = sc2210->client;
  1072. int ret = 0;
  1073. mutex_lock(&sc2210->mutex);
  1074. /* If the power state is not modified - no work to do. */
  1075. if (sc2210->power_on == !!on)
  1076. goto unlock_and_return;
  1077. if (on) {
  1078. ret = pm_runtime_get_sync(&client->dev);
  1079. if (ret < 0) {
  1080. pm_runtime_put_noidle(&client->dev);
  1081. goto unlock_and_return;
  1082. }
  1083. if (!sc2210->is_thunderboot) {
  1084. printk("sc2210_write_array sc2210_linear_10_1920x1080_30fps_regs\n");
  1085. ret = sc2210_write_array(sc2210->client, sc2210_linear_10_1920x1080_30fps_regs);
  1086. if (ret) {
  1087. v4l2_err(sd, "could not set init registers\n");
  1088. pm_runtime_put_noidle(&client->dev);
  1089. goto unlock_and_return;
  1090. }
  1091. }
  1092. sc2210->power_on = true;
  1093. } else {
  1094. pm_runtime_put(&client->dev);
  1095. sc2210->power_on = false;
  1096. }
  1097. unlock_and_return:
  1098. mutex_unlock(&sc2210->mutex);
  1099. return ret;
  1100. }
  1101. /* Calculate the delay in us by clock rate and clock cycles */
  1102. static inline u32 sc2210_cal_delay(u32 cycles, struct sc2210 *sc2210)
  1103. {
  1104. return DIV_ROUND_UP(cycles, sc2210->cur_mode->xvclk_freq / 1000 / 1000);
  1105. }
  1106. static int __sc2210_power_on(struct sc2210 *sc2210)
  1107. {
  1108. int ret;
  1109. u32 delay_us;
  1110. struct device *dev = &sc2210->client->dev;
  1111. if (!IS_ERR_OR_NULL(sc2210->pins_default)) {
  1112. ret = pinctrl_select_state(sc2210->pinctrl,
  1113. sc2210->pins_default);
  1114. if (ret < 0)
  1115. dev_err(dev, "could not set pins\n");
  1116. }
  1117. ret = clk_set_rate(sc2210->xvclk, sc2210->cur_mode->xvclk_freq);
  1118. if (ret < 0)
  1119. dev_warn(dev, "Failed to set xvclk rate (%dHz)\n", sc2210->cur_mode->xvclk_freq);
  1120. if (clk_get_rate(sc2210->xvclk) != sc2210->cur_mode->xvclk_freq)
  1121. dev_warn(dev, "xvclk mismatched, modes are based on %dHz\n",
  1122. sc2210->cur_mode->xvclk_freq);
  1123. ret = clk_prepare_enable(sc2210->xvclk);
  1124. if (ret < 0) {
  1125. dev_err(dev, "Failed to enable xvclk\n");
  1126. return ret;
  1127. }
  1128. if (sc2210->is_thunderboot)
  1129. return 0;
  1130. if (!IS_ERR(sc2210->reset_gpio))
  1131. gpiod_set_value_cansleep(sc2210->reset_gpio, 0);
  1132. ret = regulator_bulk_enable(sc2210_NUM_SUPPLIES, sc2210->supplies);
  1133. if (ret < 0) {
  1134. dev_err(dev, "Failed to enable regulators\n");
  1135. goto disable_clk;
  1136. }
  1137. if (!IS_ERR(sc2210->reset_gpio))
  1138. gpiod_set_value_cansleep(sc2210->reset_gpio, 1);
  1139. usleep_range(500, 1000);
  1140. if (!IS_ERR(sc2210->reset_gpio))
  1141. usleep_range(6000, 8000);
  1142. else
  1143. usleep_range(12000, 16000);
  1144. /* 8192 cycles prior to first SCCB transaction */
  1145. delay_us = sc2210_cal_delay(8192, sc2210);
  1146. usleep_range(delay_us, delay_us * 2);
  1147. return 0;
  1148. disable_clk:
  1149. clk_disable_unprepare(sc2210->xvclk);
  1150. return ret;
  1151. }
  1152. static void __sc2210_power_off(struct sc2210 *sc2210)
  1153. {
  1154. int ret;
  1155. struct device *dev = &sc2210->client->dev;
  1156. clk_disable_unprepare(sc2210->xvclk);
  1157. if (sc2210->is_thunderboot) {
  1158. if (sc2210->is_first_streamoff) {
  1159. sc2210->is_thunderboot = false;
  1160. sc2210->is_first_streamoff = false;
  1161. } else {
  1162. return;
  1163. }
  1164. }
  1165. if (!IS_ERR(sc2210->reset_gpio))
  1166. gpiod_set_value_cansleep(sc2210->reset_gpio, 0);
  1167. if (!IS_ERR_OR_NULL(sc2210->pins_sleep)) {
  1168. ret = pinctrl_select_state(sc2210->pinctrl,
  1169. sc2210->pins_sleep);
  1170. if (ret < 0)
  1171. dev_dbg(dev, "could not set pins\n");
  1172. }
  1173. regulator_bulk_disable(sc2210_NUM_SUPPLIES, sc2210->supplies);
  1174. }
  1175. static int sc2210_runtime_resume(struct device *dev)
  1176. {
  1177. struct i2c_client *client = to_i2c_client(dev);
  1178. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1179. struct sc2210 *sc2210 = to_sc2210(sd);
  1180. return __sc2210_power_on(sc2210);
  1181. }
  1182. static int sc2210_runtime_suspend(struct device *dev)
  1183. {
  1184. struct i2c_client *client = to_i2c_client(dev);
  1185. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1186. struct sc2210 *sc2210 = to_sc2210(sd);
  1187. __sc2210_power_off(sc2210);
  1188. return 0;
  1189. }
  1190. #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
  1191. static int sc2210_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1192. {
  1193. struct sc2210 *sc2210 = to_sc2210(sd);
  1194. struct v4l2_mbus_framefmt *try_fmt =
  1195. v4l2_subdev_get_try_format(sd, fh->pad, 0);
  1196. const struct sc2210_mode *def_mode = &supported_modes[0];
  1197. mutex_lock(&sc2210->mutex);
  1198. /* Initialize try_fmt */
  1199. try_fmt->width = def_mode->width;
  1200. try_fmt->height = def_mode->height;
  1201. try_fmt->code = def_mode->bus_fmt;
  1202. try_fmt->field = V4L2_FIELD_NONE;
  1203. mutex_unlock(&sc2210->mutex);
  1204. /* No crop or compose */
  1205. return 0;
  1206. }
  1207. #endif
  1208. static int sc2210_enum_frame_interval(struct v4l2_subdev *sd,
  1209. struct v4l2_subdev_pad_config *cfg,
  1210. struct v4l2_subdev_frame_interval_enum *fie)
  1211. {
  1212. if (fie->index >= ARRAY_SIZE(supported_modes))
  1213. return -EINVAL;
  1214. fie->code = supported_modes[fie->index].bus_fmt;
  1215. fie->width = supported_modes[fie->index].width;
  1216. fie->height = supported_modes[fie->index].height;
  1217. fie->interval = supported_modes[fie->index].max_fps;
  1218. fie->reserved[0] = supported_modes[fie->index].hdr_mode;
  1219. return 0;
  1220. }
  1221. static const struct dev_pm_ops sc2210_pm_ops = {
  1222. SET_RUNTIME_PM_OPS(sc2210_runtime_suspend,
  1223. sc2210_runtime_resume, NULL)
  1224. };
  1225. #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
  1226. static const struct v4l2_subdev_internal_ops sc2210_internal_ops = {
  1227. .open = sc2210_open,
  1228. };
  1229. #endif
  1230. static const struct v4l2_subdev_core_ops sc2210_core_ops = {
  1231. .s_power = sc2210_s_power,
  1232. .ioctl = sc2210_ioctl,
  1233. #ifdef CONFIG_COMPAT
  1234. .compat_ioctl32 = sc2210_compat_ioctl32,
  1235. #endif
  1236. };
  1237. static const struct v4l2_subdev_video_ops sc2210_video_ops = {
  1238. .s_stream = sc2210_s_stream,
  1239. .g_frame_interval = sc2210_g_frame_interval,
  1240. };
  1241. static const struct v4l2_subdev_pad_ops sc2210_pad_ops = {
  1242. .enum_mbus_code = sc2210_enum_mbus_code,
  1243. .enum_frame_size = sc2210_enum_frame_sizes,
  1244. .enum_frame_interval = sc2210_enum_frame_interval,
  1245. .get_fmt = sc2210_get_fmt,
  1246. .set_fmt = sc2210_set_fmt,
  1247. .get_mbus_config = sc2210_g_mbus_config,
  1248. };
  1249. static const struct v4l2_subdev_ops sc2210_subdev_ops = {
  1250. .core = &sc2210_core_ops,
  1251. .video = &sc2210_video_ops,
  1252. .pad = &sc2210_pad_ops,
  1253. };
  1254. /// @brief
  1255. /// @param ctrl
  1256. /// @return
  1257. static int sc2210_set_ctrl(struct v4l2_ctrl *ctrl)
  1258. {
  1259. struct sc2210 *sc2210 = container_of(ctrl->handler,
  1260. struct sc2210, ctrl_handler);
  1261. struct i2c_client *client = sc2210->client;
  1262. s64 max;
  1263. int ret = 0;
  1264. u32 val = 0;
  1265. /* Propagate change of current control to all related controls */
  1266. switch (ctrl->id) {
  1267. case V4L2_CID_VBLANK:
  1268. /* Update max exposure while meeting expected vblanking */
  1269. max = sc2210->cur_mode->height + ctrl->val - 8;
  1270. __v4l2_ctrl_modify_range(sc2210->exposure,
  1271. sc2210->exposure->minimum, max,
  1272. sc2210->exposure->step,
  1273. sc2210->exposure->default_value);
  1274. break;
  1275. }
  1276. if (!pm_runtime_get_if_in_use(&client->dev))
  1277. return 0;
  1278. switch (ctrl->id) {
  1279. case V4L2_CID_EXPOSURE:
  1280. dev_dbg(&client->dev, "set exposure 0x%x\n", ctrl->val);
  1281. printk("set exposure 0x%x\n", ctrl->val);
  1282. if (sc2210->cur_mode->hdr_mode == NO_HDR) {
  1283. // if (0) {
  1284. val = ctrl->val;
  1285. // // /* 4 least significant bits of expsoure are fractional part */
  1286. ret = sc2210_write_reg(sc2210->client,
  1287. sc2210_REG_EXPOSURE_H,
  1288. sc2210_REG_VALUE_08BIT,
  1289. sc2210_FETCH_EXP_H(val));
  1290. ret |= sc2210_write_reg(sc2210->client,
  1291. sc2210_REG_EXPOSURE_M,
  1292. sc2210_REG_VALUE_08BIT,
  1293. sc2210_FETCH_EXP_M(val));
  1294. ret |= sc2210_write_reg(sc2210->client,
  1295. sc2210_REG_EXPOSURE_L,
  1296. sc2210_REG_VALUE_08BIT,
  1297. sc2210_FETCH_EXP_L(val));
  1298. }
  1299. break;
  1300. case V4L2_CID_ANALOGUE_GAIN:
  1301. dev_dbg(&client->dev, "set gain 0x%x\n", ctrl->val);
  1302. if (sc2210->cur_mode->hdr_mode == NO_HDR)
  1303. ret = sc2210_set_gain_reg(sc2210, ctrl->val);
  1304. break;
  1305. case V4L2_CID_VBLANK:
  1306. dev_dbg(&client->dev, "set vblank 0x%x\n", ctrl->val);
  1307. ret = sc2210_write_reg(sc2210->client,
  1308. sc2210_REG_VTS_H,
  1309. sc2210_REG_VALUE_08BIT,
  1310. (ctrl->val + sc2210->cur_mode->height)
  1311. >> 8);
  1312. ret |= sc2210_write_reg(sc2210->client,
  1313. sc2210_REG_VTS_L,
  1314. sc2210_REG_VALUE_08BIT,
  1315. (ctrl->val + sc2210->cur_mode->height)
  1316. & 0xff);
  1317. sc2210->cur_vts = ctrl->val + sc2210->cur_mode->height;
  1318. break;
  1319. case V4L2_CID_TEST_PATTERN:
  1320. ret = sc2210_enable_test_pattern(sc2210, ctrl->val);
  1321. break;
  1322. case V4L2_CID_HFLIP:
  1323. ret = sc2210_read_reg(sc2210->client, sc2210_FLIP_MIRROR_REG,
  1324. sc2210_REG_VALUE_08BIT, &val);
  1325. ret |= sc2210_write_reg(sc2210->client, sc2210_FLIP_MIRROR_REG,
  1326. sc2210_REG_VALUE_08BIT,
  1327. sc2210_FETCH_MIRROR(val, ctrl->val));
  1328. break;
  1329. case V4L2_CID_VFLIP:
  1330. ret = sc2210_read_reg(sc2210->client, sc2210_FLIP_MIRROR_REG,
  1331. sc2210_REG_VALUE_08BIT, &val);
  1332. ret |= sc2210_write_reg(sc2210->client, sc2210_FLIP_MIRROR_REG,
  1333. sc2210_REG_VALUE_08BIT,
  1334. sc2210_FETCH_FLIP(val, ctrl->val));
  1335. break;
  1336. default:
  1337. dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
  1338. __func__, ctrl->id, ctrl->val);
  1339. break;
  1340. }
  1341. pm_runtime_put(&client->dev);
  1342. return ret;
  1343. }
  1344. static const struct v4l2_ctrl_ops sc2210_ctrl_ops = {
  1345. .s_ctrl = sc2210_set_ctrl
  1346. };
  1347. static int sc2210_initialize_controls(struct sc2210 *sc2210)
  1348. {
  1349. const struct sc2210_mode *mode;
  1350. struct v4l2_ctrl_handler *handler;
  1351. struct device *dev = &sc2210->client->dev;
  1352. s64 exposure_max, vblank_def;
  1353. u32 h_blank;
  1354. int ret;
  1355. u64 dst_link_freq = 0;
  1356. u64 dst_pixel_rate = 0;
  1357. handler = &sc2210->ctrl_handler;
  1358. mode = sc2210->cur_mode;
  1359. ret = v4l2_ctrl_handler_init(handler, 9);
  1360. if (ret)
  1361. return ret;
  1362. handler->lock = &sc2210->mutex;
  1363. sc2210->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
  1364. V4L2_CID_LINK_FREQ,
  1365. ARRAY_SIZE(link_freq_menu_items) - 1, 0, link_freq_menu_items);
  1366. if (sc2210->link_freq)
  1367. sc2210->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1368. dst_link_freq = mode->link_freq_idx;
  1369. dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
  1370. sc2210_BITS_PER_SAMPLE * 2 * sc2210_LANES;
  1371. sc2210->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
  1372. 0, PIXEL_RATE_WITH_405M_10BIT, 1, dst_pixel_rate);
  1373. __v4l2_ctrl_s_ctrl(sc2210->link_freq, dst_link_freq);
  1374. h_blank = mode->hts_def - mode->width;
  1375. sc2210->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
  1376. h_blank, h_blank, 1, h_blank);
  1377. if (sc2210->hblank)
  1378. sc2210->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1379. vblank_def = mode->vts_def - mode->height;
  1380. sc2210->vblank = v4l2_ctrl_new_std(handler, &sc2210_ctrl_ops,
  1381. V4L2_CID_VBLANK, vblank_def,
  1382. sc2210_VTS_MAX - mode->height,
  1383. 1, vblank_def);
  1384. exposure_max = mode->vts_def - 8;
  1385. sc2210->exposure = v4l2_ctrl_new_std(handler, &sc2210_ctrl_ops,
  1386. V4L2_CID_EXPOSURE, sc2210_EXPOSURE_MIN,
  1387. exposure_max, sc2210_EXPOSURE_STEP,
  1388. mode->exp_def);
  1389. sc2210->anal_gain = v4l2_ctrl_new_std(handler, &sc2210_ctrl_ops,
  1390. V4L2_CID_ANALOGUE_GAIN, sc2210_GAIN_MIN,
  1391. sc2210_GAIN_MAX, sc2210_GAIN_STEP,
  1392. sc2210_GAIN_DEFAULT);
  1393. sc2210->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
  1394. &sc2210_ctrl_ops,
  1395. V4L2_CID_TEST_PATTERN,
  1396. ARRAY_SIZE(sc2210_test_pattern_menu) - 1,
  1397. 0, 0, sc2210_test_pattern_menu);
  1398. v4l2_ctrl_new_std(handler, &sc2210_ctrl_ops,
  1399. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1400. v4l2_ctrl_new_std(handler, &sc2210_ctrl_ops,
  1401. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1402. if (handler->error) {
  1403. ret = handler->error;
  1404. dev_err(&sc2210->client->dev,
  1405. "Failed to init controls(%d)\n", ret);
  1406. goto err_free_handler;
  1407. }
  1408. sc2210->subdev.ctrl_handler = handler;
  1409. sc2210->has_init_exp = false;
  1410. dev_info(dev,"sc2210_initialize_controls \n");
  1411. return 0;
  1412. err_free_handler:
  1413. v4l2_ctrl_handler_free(handler);
  1414. return ret;
  1415. }
  1416. static int sc2210_check_sensor_id(struct sc2210 *sc2210,
  1417. struct i2c_client *client)
  1418. {
  1419. struct device *dev = &sc2210->client->dev;
  1420. u32 id = 0;
  1421. int ret;
  1422. if (sc2210->is_thunderboot) {
  1423. dev_info(dev, "Enable thunderboot mode, skip sensor id check\n");
  1424. return 0;
  1425. }
  1426. ret = sc2210_read_reg(client, sc2210_REG_CHIP_ID,
  1427. sc2210_REG_VALUE_16BIT, &id);
  1428. if (id != CHIP_ID) {
  1429. dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
  1430. return -ENODEV;
  1431. }
  1432. dev_info(dev, "Detected SC%06x sensor\n", CHIP_ID);
  1433. return 0;
  1434. }
  1435. static int sc2210_configure_regulators(struct sc2210 *sc2210)
  1436. {
  1437. unsigned int i;
  1438. for (i = 0; i < sc2210_NUM_SUPPLIES; i++)
  1439. sc2210->supplies[i].supply = sc2210_supply_names[i];
  1440. return devm_regulator_bulk_get(&sc2210->client->dev,
  1441. sc2210_NUM_SUPPLIES,
  1442. sc2210->supplies);
  1443. }
  1444. static int sc2210_probe(struct i2c_client *client,
  1445. const struct i2c_device_id *id)
  1446. {
  1447. struct device *dev = &client->dev;
  1448. struct device_node *node = dev->of_node;
  1449. struct sc2210 *sc2210;
  1450. struct v4l2_subdev *sd;
  1451. char facing[2];
  1452. int ret;
  1453. int i, hdr_mode = 0;
  1454. dev_info(dev, "driver version: %02x.%02x.%02x",
  1455. DRIVER_VERSION >> 16,
  1456. (DRIVER_VERSION & 0xff00) >> 8,
  1457. DRIVER_VERSION & 0x00ff);
  1458. sc2210 = devm_kzalloc(dev, sizeof(*sc2210), GFP_KERNEL);
  1459. if (!sc2210)
  1460. return -ENOMEM;
  1461. ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
  1462. &sc2210->module_index);
  1463. ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
  1464. &sc2210->module_facing);
  1465. ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
  1466. &sc2210->module_name);
  1467. ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
  1468. &sc2210->len_name);
  1469. if (ret) {
  1470. dev_err(dev, "could not get module information!\n");
  1471. return -EINVAL;
  1472. }
  1473. sc2210->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
  1474. sc2210->client = client;
  1475. for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
  1476. if (hdr_mode == supported_modes[i].hdr_mode) {
  1477. sc2210->cur_mode = &supported_modes[i];
  1478. break;
  1479. }
  1480. }
  1481. if (i == ARRAY_SIZE(supported_modes))
  1482. sc2210->cur_mode = &supported_modes[0];
  1483. sc2210->xvclk = devm_clk_get(dev, "xvclk");
  1484. if (IS_ERR(sc2210->xvclk)) {
  1485. dev_err(dev, "Failed to get xvclk\n");
  1486. return -EINVAL;
  1487. }
  1488. if (sc2210->is_thunderboot) {
  1489. sc2210->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_ASIS);
  1490. if (IS_ERR(sc2210->reset_gpio))
  1491. dev_warn(dev, "Failed to get reset-gpios\n");
  1492. } else {
  1493. sc2210->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
  1494. if (IS_ERR(sc2210->reset_gpio))
  1495. dev_warn(dev, "Failed to get reset-gpios\n");
  1496. }
  1497. sc2210->pinctrl = devm_pinctrl_get(dev);
  1498. if (!IS_ERR(sc2210->pinctrl)) {
  1499. sc2210->pins_default =
  1500. pinctrl_lookup_state(sc2210->pinctrl,
  1501. OF_CAMERA_PINCTRL_STATE_DEFAULT);
  1502. if (IS_ERR(sc2210->pins_default))
  1503. dev_err(dev, "could not get default pinstate\n");
  1504. sc2210->pins_sleep =
  1505. pinctrl_lookup_state(sc2210->pinctrl,
  1506. OF_CAMERA_PINCTRL_STATE_SLEEP);
  1507. if (IS_ERR(sc2210->pins_sleep))
  1508. dev_err(dev, "could not get sleep pinstate\n");
  1509. } else {
  1510. dev_err(dev, "no pinctrl\n");
  1511. }
  1512. ret = sc2210_configure_regulators(sc2210);
  1513. if (ret) {
  1514. dev_err(dev, "Failed to get power regulators\n");
  1515. return ret;
  1516. }
  1517. mutex_init(&sc2210->mutex);
  1518. sd = &sc2210->subdev;
  1519. v4l2_i2c_subdev_init(sd, client, &sc2210_subdev_ops);
  1520. ret = sc2210_initialize_controls(sc2210);
  1521. if (ret)
  1522. goto err_destroy_mutex;
  1523. ret = __sc2210_power_on(sc2210);
  1524. if (ret)
  1525. goto err_free_handler;
  1526. ret = sc2210_check_sensor_id(sc2210, client);
  1527. if (ret)
  1528. goto err_power_off;
  1529. #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
  1530. sd->internal_ops = &sc2210_internal_ops;
  1531. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
  1532. V4L2_SUBDEV_FL_HAS_EVENTS;
  1533. #endif
  1534. #if defined(CONFIG_MEDIA_CONTROLLER)
  1535. sc2210->pad.flags = MEDIA_PAD_FL_SOURCE;
  1536. sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
  1537. ret = media_entity_pads_init(&sd->entity, 1, &sc2210->pad);
  1538. if (ret < 0)
  1539. goto err_power_off;
  1540. #endif
  1541. memset(facing, 0, sizeof(facing));
  1542. if (strcmp(sc2210->module_facing, "back") == 0)
  1543. facing[0] = 'b';
  1544. else
  1545. facing[0] = 'f';
  1546. snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
  1547. sc2210->module_index, facing,
  1548. sc2210_NAME, dev_name(sd->dev));
  1549. ret = v4l2_async_register_subdev_sensor_common(sd);
  1550. if (ret) {
  1551. dev_err(dev, "v4l2 async register subdev failed\n");
  1552. goto err_clean_entity;
  1553. }
  1554. pm_runtime_set_active(dev);
  1555. pm_runtime_enable(dev);
  1556. if (sc2210->is_thunderboot)
  1557. pm_runtime_get_sync(dev);
  1558. else
  1559. pm_runtime_idle(dev);
  1560. return 0;
  1561. err_clean_entity:
  1562. #if defined(CONFIG_MEDIA_CONTROLLER)
  1563. media_entity_cleanup(&sd->entity);
  1564. #endif
  1565. err_power_off:
  1566. __sc2210_power_off(sc2210);
  1567. err_free_handler:
  1568. v4l2_ctrl_handler_free(&sc2210->ctrl_handler);
  1569. err_destroy_mutex:
  1570. mutex_destroy(&sc2210->mutex);
  1571. return ret;
  1572. }
  1573. static int sc2210_remove(struct i2c_client *client)
  1574. {
  1575. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1576. struct sc2210 *sc2210 = to_sc2210(sd);
  1577. v4l2_async_unregister_subdev(sd);
  1578. #if defined(CONFIG_MEDIA_CONTROLLER)
  1579. media_entity_cleanup(&sd->entity);
  1580. #endif
  1581. v4l2_ctrl_handler_free(&sc2210->ctrl_handler);
  1582. mutex_destroy(&sc2210->mutex);
  1583. pm_runtime_disable(&client->dev);
  1584. if (!pm_runtime_status_suspended(&client->dev))
  1585. __sc2210_power_off(sc2210);
  1586. pm_runtime_set_suspended(&client->dev);
  1587. return 0;
  1588. }
  1589. #if IS_ENABLED(CONFIG_OF)
  1590. static const struct of_device_id sc2210_of_match[] = {
  1591. { .compatible = "smartsens,sc2210" },
  1592. {},
  1593. };
  1594. MODULE_DEVICE_TABLE(of, sc2210_of_match);
  1595. #endif
  1596. static const struct i2c_device_id sc2210_match_id[] = {
  1597. { "smartsens,sc2210", 0 },
  1598. { },
  1599. };
  1600. static struct i2c_driver sc2210_i2c_driver = {
  1601. .driver = {
  1602. .name = sc2210_NAME,
  1603. .pm = &sc2210_pm_ops,
  1604. .of_match_table = of_match_ptr(sc2210_of_match),
  1605. },
  1606. .probe = &sc2210_probe,
  1607. .remove = &sc2210_remove,
  1608. .id_table = sc2210_match_id,
  1609. };
  1610. static int __init sensor_mod_init(void)
  1611. {
  1612. return i2c_add_driver(&sc2210_i2c_driver);
  1613. }
  1614. static void __exit sensor_mod_exit(void)
  1615. {
  1616. i2c_del_driver(&sc2210_i2c_driver);
  1617. }
  1618. #if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC)
  1619. subsys_initcall(sensor_mod_init);
  1620. #else
  1621. device_initcall_sync(sensor_mod_init);
  1622. #endif
  1623. module_exit(sensor_mod_exit);
  1624. MODULE_DESCRIPTION("smartsens sc2210 sensor driver");
  1625. MODULE_LICENSE("GPL");